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Product Errata 59

Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors

25759 Rev. 3.79 July 2009

98 LDTSTOP Assertion May Be Missed

Description

If LDTSTOP width is too short relative to the programmed value of Clock Ramp Hysteresis, the

LDTSTOP assertion may be missed.

Potential Effect on System

FID changes or HyperTransport width/frequency changes may not work correctly.

Suggested Workaround

Program the Clock Ramp Hysteresis value (Dev:3xD4 [10-8]) to be less than the LDTSTOP pulse

width. Refer to the BIOS and Kernel Developer’s Guide for AMD Athlon™ 64 and AMD Opteron™

Processors, order# 26094, for recommended LDTSTOP durations for each platform type.

Fix Planned

Yes

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AMD Athlon 6 Specifiche Pagina 59